Congardt, a leading provider of embedded and edge computing technologies, has announced the launch of a new carrier design training course designed to teach best practices in the design-in process for advanced computer module standards (COM-HPC and SMARC), providing system architects with a fast, easy and efficient way to learn more. Give them insight into the design rules of these PICMG and SGET standards. This training course will take engineers through all the necessary and recommended design points and best practices for the carrier circuit diagram of computer modules, effectively empowering developers to create their own carrier design projects. The course focuses on standards-compliant carrier design, which is essential to the construction of customized embedded computing platforms with interoperability, scalability, and durability. Courses will be offered online and in person worldwide for a wide range of developers from Oems, value added distributors (vars) and system integrators.

Daniel Stadler, Manager of Technical Support and Design-in at Congatet, says: “The official Design guidelines published by various standardization associations are a good reference resource, but at the end of the day, they are just a bunch of detailed requirements. Developers must master the best way to implement these basic requirements in reality. We created this training program to speed up the dissemination of knowledge, to enable people to carry out development projects in the field, and to give developers the knowledge they need to design their own boards.”

PCI-5114

With Congatet’s new carrier design training course, engineers will be able to tap into high-end embedded and edge computing. The course covers PCB layout purposes, power management rules, signal integrity requirements, and component selection. Computer interface courses teach developers how to avoid pitfalls in the difficult design of high-speed serial communications – from PCIe Gen 5, USB 3.2 Gen 2, and the Thunderbolt-enabled USB 4 standard, to USB C and 100GbE Ethernet interfaces. Management of sideband signals (which must be deserialized at the COM-HPC carrier end) is also included. It is worth mentioning that the course will cover how to design the best use of interface standards such as eSPI, I²C and GPIO. In addition, the Design-in course covers the implementation of the Congate x86 firmware – including the features of the embedded BIOS, the on-board management controller, and the module management controller. Finally, the Verification and Testing approach course helps participants solve all the challenges from initial carrier design verification to large-scale production testing.

COM-HPC and SMARC Carrier Design courses are offered by the Congatet Training Academy and require a subscription. Participants who successfully complete the training will automatically receive a certificate proving that they have acquired the knowledge necessary to become an expert in carrier board design.