Description
Overview
Essential details:VMIVME-4120-000 16-Channel D/A Current or Voltage Output Board
Products Description
Features:
• 16 analog output channels
• Jumper-selectable voltage or current outputs
• Current transmitter ranges (0 to 20mA, 4 to 20mA, and 5 to 25mA)
• Output voltage ranges (0 to +5V, 0 to +10V, ±2.5V, ±5V, ±10V)
• 12-bit resolution
• Front panel outputs (P3)
• On-board DC-to-DC converter or external power supply
• cation 14-1987 – IEC 821 and 297 option
• Optional voltage-only outputs Complies with VMEbus specifi – ANSI/IEEE STD 10
Applications:
• Industrial process control
• Current source reference for data acquisition
• Programmable current source for test equipment
• Automated manufacturing
• GE-Fanuc 90-70 series PLC
Introduction: The VMIVME-4120 Analog Output Board provides 16 high-quality analog output channels. These channels are jumper-selectable for voltage outputs, current loop outputs, or a combination of voltage and current loop outputs. Each output range is also jumper-selectable. A block diagram of the board is shown in Figure 1. (Typical at +25° C and rated power supplies unless otherwise stated.)
Compliance: This product complies with VMEbus specification ANSI/IEEE STD 1014-1987 IEC 821 and 297, with the following mnemonics: A16: D16, D08 (EO): 29, 2D Board Address: The physical address for the board may be selected by on-board jumpers. VMEbus address lines A06 through A15 are decoded for board selection.
VMEbus Access: Address modifier bits are jumper-selected and decoded to support nonprivileged short I/O or supervisory short I/O. The board is factory configured for supervisory short I/O. Output Data Transfer: Data for each analog output channel is written directly into an on-board RAM location dedicated to a specific channel. The data is then periodically retrieved from the RAM, and converted to an analog voltage which is then transferred to one of 16 output sample-and-hold output buffers. Memory Test: This product is designed with dual-port on-board memory that may be tested by executing a memory diagnostic for operational verification.
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