CP401-10 S1 Processor Module YOKOGAWA

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Overview

Essential details：CP401-10 S1 Processor Module YOKOGAWA

card (CP345) and SB bus interface card (SB301) of the industry-proven CENTUM CS3000, and incorporated them into a singlemodule, while maintaining the software compatibility as much aspossible.Equipped with the microprocessor which is field-provenas has been used for the industry-proven CP345 processor card,the processor module makes it possible to build scalable systemsby using the same system software for small- to medium-scaleplants and large-scale plants as well.
In order to mount the CP345 and SB301 on a single module(i.e., to achieve downsizing), we actively adopted a programmabledevice in a fine-pitched multi-pin ball grid array (BGA) as a large-scale integration component, chip capacitors and resistors of 1005size as small-size components，and new elemental technologies,including build-up boards for densely mounting such components.The processor module contains a battery pack in order to backup the main memory in case of power failure.However, takingenvironmental protection into consideration,the conventionalnickel-cadmium batteries have been abandoned and replacedwith nickel-hydrogen batteries.
SEN Bus
we have also developed the SEN bus for program copyingand data equalization between the processor modules.Table ishows the specifications of the SEN bus in brief.
Traditionally, data exchange between the processor moduleshas been performed using a parallel transmission method.In thecase of the SEN bus however, the method has been replaced withthe point-to-point high-speed serial transmission method toreduce the mounting area and the number of signal lines to one-tenth those of the conventional bus. Since the LVDS(EIA/TIA-644 standard) method featuring small signal amplitudes has beenadopted for the bus signal levels, radiation noise has been reducedand power consumption has also been dramatically reduced.From the point of view of high reliability, we added an error-detecting code and made it possible to connect/disconnect themodule with the line electrified. The SEN bus is provided witherror-detecting functions,such as constantly performing self-diagnoses using idle frames even in the absence of bus accessrequests. From a software point of view, the SEN bus inheritsexactly the same interface as that of the existing backplane bus.

CP401-10 S1

CPU Node
A maximum of eight IOMs can be installed in the CPU node,allowing the CPU node to operate alone as the minimum systemof the FFCS.
A maximum of three extension nodes (direct-coupling andremote nodes) can be connected to the CPU node. Whenconnecting the CPU node and direct-coupling node, an ESB buscoupler module (EC401) is installed in the IOM section of thecPU node and an ESB bus slave interface module (SB401) isinstalled in the extension node. When using the remote node inplace of the extension node, an ER bus master interface module(EB401) is installed in the IOM section of the CPU node or direct-coupling node.
Processor Module(CP401)
Figure 5 shows the dual-redundant configuration of theprocessor modules. The dual-redundant processor modulesemploy the field-proven Pair & Spare method. Each processormodule comprises two MPUs, where the MPUs perform the samecontrol computations and the computation results are cross-checked by the collators to detect transient errors. With the dualredundancy of processor modules, the transfer of the control rightin case of system failure and the continuation of control areaccomplished without any momentary shutdown, achieving highdegrees of system availability.
Figure 6 shows the external view of the processor module.The module has been changed in shape from the conventionalcard-like form to a modular form in which the internal assemblyis encapsulated in a molded housing.For the internal hardwareconfiguration, we reused the hardware assets, i.e., the processor

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