Siemens Digital Industry Software has announced that it has deepened its partnership with TSMC with a series of new certifications and collaborations, and a number of Siemens EDA tools and solutions have been certified by TSMC’s new process technology.
“TSMC works with its design ecosystem partners, including Siemens, to provide customers with proven design solutions that leverage the powerful performance and energy efficiency benefits of TSMC’s advanced processes to help them continue to innovate,” said Dan Kochpatcharin, head of TSMC’s Design Infrastructure Management business unit.
Siemens Calibre is TSMC N2 process certified
Calibre® nmPlatform tool for integrated circuit (IC) verification sign-off is now TSMC N2 process certified, providing full support for early adopters of TSMC N2 process technology. Certified Calibre tools include Calibre® nmDRC software, Calibre® YieldEnhancer™ software, Calibre® PERC™ software, and Calibre® nmLVS software.
TSMC also certifies the N4P process for Siemens mPowerâ„¢ simulation software for transistor-level electromigration (EM) and voltage drop (IR) sign-off. Joint customers will now be able to use mPower’s unique EM/IR sign-off solution for next-generation analog or radio frequency (RF) designs.
In addition, TSMC’s N4P, N3E and N2 Custom Design Reference Processes (CDRF) can now be used in conjunction with Siemens’ Solidoâ„¢ Design Environment software for advanced deviation sensing verification at high sigma. The Siemens Analog FastSPICE platform for circuit validation of nanoscale analog, RF, mixed-signal, memory and customized digital circuits has also been successfully certified by TSMC for the N5A, N3E, N3P and N2 processes. As part of TSMC’s CDRF for N4P, N3E, and N2 processes, Analog FastSPICE supports TSMC’s reliability sensing simulation technology to address IC aging and real-time self-heating effects, among other reliable features.
Aprisa layout cabling solution is N3 technology certified
Siemens’ Aprisaâ„¢ layout and routing solution is certified by TSMC for the N3E process, further strengthening Siemens’ commitment to invest in digital implementations, and is easy to use and helps customers move quickly to N3E nodes.
Joe Sawicki, Executive Vice President, Digital Industrial Software IC-EDA, Siemens, said: “TSMC’s speed of innovation is impressive, and we are excited to establish a long-term partnership with TSMC to continuously optimize EDA solutions for TSMC’s new processes to benefit our mutual customers and meet their rapidly changing market and business needs.”
TSMC certifies Siemens 3D IC solutions
Several Siemens 3D IC solutions have also made substantial progress in TSMC 3DFabricâ„¢ technology certification. TSMC has certified Siemens’ Calibre® 3DSTACK software to the 3Dblox 2.0 standard, including physical analysis and circuit verification. This certification includes support for DRC and LVS checks between small chips to meet TSMC’s 3DFabric technical requirements.
In addition, TSMC has certified a range of Tessentâ„¢ 3D IC solutions, Includes Tessent hierarchical DFT, Tessent Multi-die with Enhanced TAP (test access port – IEEE 1838 compliant), native FPP using Stream Scan Network (SSN) and IEEE 1687 IJTAG networking technology (Flexible parallel port) support. The two companies have also invested in building a 3D IC test ecosystem based on TSMC’s 3Dblox standards, including known good metal chip (KGD) loopback testing and physically-aware inter-chip fault detection and diagnosis using BMAP and PMAP standards.