Catapult AI NN is a comprehensive solution that helps software engineers integrate AI neural networks
Software development teams are able to seamlessly translate AI models designed in Python into chip-based implementations, contributing to faster and more energy efficient execution compared to standard processors

1783-BMS12T4E2CGNK Siemens Digital Industry Software has launched Catapult™ AI NN software that helps neural network accelerators achieve high level synthesis (HLS) on application-specific integrated circuits (ASics) and system-on-chip (SoCs). Catapult AI NN is a comprehensive solution that takes a neural network description in an AI framework, converts it into C++ code, and integrates it into an RTL accelerator in Verilog or VHDL for on-chip implementation.

Catapult AI NN integrates hls4ml, an open source software package for machine learning hardware acceleration, and the Siemens Catapult™ HLS software for high-level synthesis.

Mo Movahed, Vice President of Digital Industrial Software and General Manager of High-level Design, Validation and Power Consumption at Siemens, said: “Both the handover process of the neural network model and its manual conversion to a hardware implementation are very inefficient, time-consuming and error-prone, especially when creating and validating hardware accelerator variants tailored to specific performance, power consumption and area. By enabling scientists and AI experts to take full advantage of industry-standard AI frameworks, such as neural network model design, and seamlessly integrate these models into hardware designs that have been optimized with PPA, we are able to create more possibilities for AI/ML software engineers. “With Siemens’ new Catapult AI NN solution, developers can automatically implement neural network models in the software development process while optimizing PPA, effectively improving AI development efficiency and enabling accelerated innovation.”

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As runtime AI and machine learning tasks migrate from the data center to consumer appliances, medical devices, and more, customer demand for right-sized AI hardware is also growing rapidly to reduce power consumption, reduce costs, and differentiate end products. However, most machine learning experts are more comfortable with tools like TensorFlow, PyTorch, or Keras than they are with integrable C++, Verilog, or VHDL. In the past, there was no shortcut for AI experts to accelerate machine learning applications in appropriately sized ASics or SoC implementations. The hls4ml initiative aims to generate C++ code from neural network descriptions in AI frameworks such as TensorFlow, PyTorch, or Keras to help remedy this shortcoming. This C++ code can then be deployed for FPGA, ASIC, or SoC implementations.

1783-BMS12T4E2CGNK Catapult AI NN is able to extend the capabilities of hls4ml to ASIC and SoC design, and it includes a dedicated C++ machine learning feature library tailored to ASIC design. Using these features, designers can make latency and resource tradeoffs between various C++ code implementations to optimize PPA. In addition, designers are now able to evaluate the impact of different neural network designs to determine the ideal neural network architecture for hardware.

“Particle detectors have very tight edge AI constraints,” Panagiotis Spentzouris, head of Emerging Technologies at Fermilab, said: “We worked with Siemens to develop Catapult AI NN, a comprehensive framework that leverages the expertise of our scientists and AI experts, even if they are not ASIC designers. In addition, this framework is ideal for experienced hardware experts.”

Catapult AI NN is currently available to early adopters and will be available to all users in Q4 2024.