MVME2603-761 VME32 Processor Module MVME2600

Features:
  • MPC60x Class of Microprocessors
  • 16KB/16KB or 32KB/32KB L1 cache
  • 256KB L2 cache
  • Up to 512MB ECC DRAM On-Board Memory
  • 8MB on-board Flash, 1MB Socketed
  • Ethernet Transceiver Interface with 32-Bit PCI Local Bus DMA
  • 8- or 16-bit Fast SCSI-2 Bus Interface
  • Parallel, Floppy, Keyboard, and Mouse Interfaces

The Emerson / Motorola MVME2600 Series VME / VME64 Processor Modules are a family of VME processor modules based on the Motorola PowerPlus VME architecture with PowerPC architecture-compatible microprocessors. The flexibility of the MVME2600 provides an excellent base platform that can be quickly and easily customized for a variety of industry-specific applications. Designed to meet the needs of military and aerospace, industrial automation, and medical imaging market segments, the MVME2600 applies to a variety of applications. DRAM expansion mezzanines enable memory upgrades to the maximum 512MB of ECC DRAM without requiring additional VME slots.

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Description

Overview

Essential details：MVME2603-761 VME32 Processor Module MVME2600

DESCRIPTION

Features:
  • MPC60x Class of Microprocessors
  • 16KB/16KB or 32KB/32KB L1 cache
  • 256KB L2 cache
  • Up to 512MB ECC DRAM On-Board Memory
  • 8MB on-board Flash, 1MB Socketed
  • Ethernet Transceiver Interface with 32-Bit PCI Local Bus DMA
  • 8- or 16-bit Fast SCSI-2 Bus Interface
  • Parallel, Floppy, Keyboard, and Mouse Interfaces

The Emerson / Motorola MVME2600 Series VME / VME64 Processor Modules are a family of VME processor modules based on the Motorola PowerPlus VME architecture with PowerPC architecture-compatible microprocessors. The flexibility of the MVME2600 provides an excellent base platform that can be quickly and easily customized for a variety of industry-specific applications. Designed to meet the needs of military and aerospace, industrial automation, and medical imaging market segments, the MVME2600 applies to a variety of applications. DRAM expansion mezzanines enable memory upgrades to the maximum 512MB of ECC DRAM without requiring additional VME slots.

MVME2604761

Product parameter

Configuration:
• VME32
• 200 MHz PowerPC 603e RISC Processor
• 16 MB DRAM
• No Flash Memory Installed on Daughter Card
• 32-bit PCI Mezzanine Connector
• Scanbe Front Panel
• Front Panel Interfaces: Keyboard, Mouse, Floppy/LED
• (1) Available PMC Slot
• Compatible with MVME761 Transition Module

APPLICATION

This manual has been updated for the following reasons:
❏ To reflect that, since the differences between the MVME2600 and the MVME2700 series SBCs are primarily related to the processor and the implementation of L2 cache, the two share the same programming model. While much of this manual refers specifically to MVME2600 hardware, the programming information is applicable to both the MVME2600 and MVME2700 families.
❏ To reflect that a Universe II chip is available and that it includes fixes for PCI reset problems which existed in the earlier version of the Universe chip. For more details, see PCI Reset Problems Associated with the Initial Version of the Universe Chip on page 4-14.

This manual provides programming information for the MVME2600 and MVME2700 Single Board Computers (SBCs). Extensive programming information is provided for several Application-Specific Integrated Circuit (ASIC) devices used on the boards. Reference information is included in Appendix A for the Large Scale Integration (LSI) devices used on the boards and sources for additional information are listed.
This chapter briefly describes the board level hardware features of the MVME2600 series Single Board Computers. The chapter begins with a board level overview and features list. Memory maps are next, and are the major feature of this chapter.

Programmable registers in the MVME2600/2700 series that reside in ASICs are covered in the chapters on those ASICs. Chapter 2 covers the Raven chip, Chapter 3 covers the Falcon chip set, Chapter 4 covers the Universe chip, and Chapter 5 covers certain programming features, such as interrupts and exceptions. Appendix A lists all related documentation.

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